Ross ROSS = Recommend OSS · open-source software intelligence for agents

lnis-uofu/OpenFPGA

An Open-source FPGA IP Generator observed · 2026-09-03

github.com/lnis-uofu/OpenFPGA · homepage · Verilog · MIT (permissive) observed · 2026-09-03

Health v2 · maintenance only

68/100

  • Activity 100
  • Release rhythm 8
  • Longevity 100
How is this computed?

round(0.45*activity + 0.35*rhythm + 0.20*longevity); archived -> min(score, 10) — computed 2026-09-03. Adoption (stars, forks) is never an input.

  • gap_med: n/a
  • age_days: 3002
  • days_rel: n/a
  • days_push: 0
  • n_releases_24m: 0

Full methodology

Adoption not part of the score

1142 stars · 205 forks observed · 2026-09-03

What it is AI-extracted, prompt v1, taxonomy v1, 2026-08-30, confidence not recorded

OpenFPGA is the first open-source FPGA IP generator with silicon proofs, supporting highly customizable FPGA architectures. It provides a complete EDA flow for customized FPGAs, including Verilog-to-bitstream generation and self-testing verification.

Use cases

  • generate FPGA IP cores from custom architecture descriptions
  • produce bitstreams for a custom FPGA fabric from Verilog
  • prototype and explore new FPGA architectures in research
  • run full Verilog-to-bitstream EDA flow for an open-source FPGA
  • verify and self-test generated FPGA designs
  • build an FPGA-based SoC with a customized fabric

When to choose

  • you need to design or research custom FPGA architectures with an open toolchain
  • you want silicon-proven, open-source FPGA IP generation
  • you need a complete Verilog-to-bitstream flow for a bespoke FPGA
  • you are exploring agile hardware prototyping for reconfigurable fabrics

When to avoid

  • you only need to program a commercial off-the-shelf FPGA like Xilinx or Intel parts
  • you need a general-purpose HDL simulator rather than an FPGA generator
  • your project requires vendor-proprietary tooling and support

Facets

framework · maturity active

compiler simulation developer-tools hardware cli fpga-ip-generator verilog bitstream-generation eda-tools chip-design silicon-proven fpga-architecture code-generation eda fpga computer-architecture research linux macos docker

1 source

Member repositories

RepositoryRoleHealth v2
lnis-uofu/OpenFPGAmain68

For agents

markdown · JSON · MCP: product_card(name="lnis-uofu/OpenFPGA")

Data as of 2026-08-30T08:39:29.467469+00:00 · Report a problem