hughperkins/VeriGPU

Health v2 · maintenance only

Flags: no_releases

Adoption not part of the score

1364 stars · 144 forks observed · 2026-08-28

What it is AI-extracted, prompt v1, taxonomy v1, 2026-08-30, confidence not recorded

VeriGPU is an open-source GPU written in SystemVerilog, loosely based on the RISC-V ISA and targeting eventual ASIC tape-out for machine learning workloads. It includes a GPU runtime, single-source C++ compilation flow, and simulation tooling, with the goal of being compatible with PyTorch via a HIP-like API.

Use cases

• build an open-source GPU in Verilog for machine learning
• simulate a RISC-V-based GPU core before ASIC tape-out
• run PyTorch workloads on a custom open-source GPU
• learn GPU architecture and hardware design in SystemVerilog
• experiment with BF16-focused ML accelerator cores
• verify timing and correctness of a custom GPU design

When to choose

• you want to study or modify an open-source GPU hardware design written in SystemVerilog
• you need a simulated RISC-V-like GPU core for ML experiments
• you are exploring ASIC tape-out of a custom ML accelerator
• you want a PyTorch-compatible open hardware GPU project to contribute to

When to avoid

• you need a production GPU with mature drivers and real hardware performance today
• you want a drop-in replacement for NVIDIA or AMD GPUs in a training pipeline
• you need CUDA or SYCL support that is fully implemented and stable
• you are not prepared to work with hardware description languages and simulation tooling

Facets

library · maturity experimental

gpu-computing machine-learning simulation compiler sdk hardware gpu-computing machine-learning embedded-systems cpp python verilog systemverilog risc-v asic-design open-source-gpu pytorch hip hardware-verification bfloat16 linux

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markdown · JSON · MCP: product_card(name="hughperkins/VeriGPU")