rust-embedded/riscv

Health v2 · maintenance only

Adoption not part of the score

1126 stars · 200 forks observed · 2026-08-28

What it is AI-extracted, prompt v1, taxonomy v1, 2026-08-30, confidence not recorded

A collection of Rust crates providing low-level access to RISC-V processors, including CPU register access, intrinsics, standard peripheral interfaces, startup code, interrupt handling, and semihosting support. It is maintained by the Rust Embedded working group's RISC-V team and serves as a foundation for writing bare-metal Rust programs on RISC-V microcontrollers.

Use cases

• access risc-v cpu registers and intrinsics from rust
• write bare-metal rust firmware for risc-v microcontrollers
• handle interrupts and startup code on risc-v targets
• interface with standard risc-v peripherals like clint and plic
• use semihosting to debug risc-v programs
• build a risc-v pac crate with common traits
• parse risc-v target specifications in build scripts

When to choose

• you are writing no_std rust code for a risc-v microcontroller
• you need low-level register and peripheral access on risc-v
• you are building a hardware abstraction layer or pac for a risc-v chip
• you want a maintained, community-backed foundation crate for risc-v embedded rust

When to avoid

• you are targeting arm or other non-risc-v architectures
• you need a high-level hal with drivers for specific boards rather than low-level access
• you are writing hosted application code that does not touch hardware directly

Facets

library · maturity stable

embedded developer-tools embedded-systems developer-tools embedded rust risc-v microcontroller bare-metal no-std registers peripherals interrupt-handling semihosting startup-code pac

Member repositories

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