splinedrive/kianRiscV

Health v2 · maintenance only

Adoption not part of the score

1113 stars · 80 forks observed · 2026-08-28

What it is AI-extracted, prompt v1, taxonomy v1, 2026-08-30, confidence not recorded

A collection of open-source RISC-V RV32IMA system-on-chip designs written in Verilog/SystemVerilog, featuring MMU with SV32 virtual memory support capable of booting Linux and XV6. Includes FPGA implementations and full-custom ASIC designs fabricated through TinyTapeout and wafer.space shuttle runs.

Use cases

• learning RISC-V CPU and SoC design in Verilog
• running Linux or XV6 on a custom open-source RISC-V SoC
• building an FPGA soft-core with MMU and virtual memory
• fabricating an open-source RISC-V ASIC via TinyTapeout
• studying SV32 virtual memory implementation in hardware
• prototyping embedded systems on open silicon

When to choose

• you want a fully open-source RTL design for a Linux-capable RV32IMA SoC
• you need an educational reference for MMU/SV32 and SoC integration in Verilog
• you plan to tape out a small RISC-V chip with open EDA tools and PDKs

When to avoid

• you need high-performance application-class RISC-V cores with out-of-order execution
• you require RV64 or modern privileged spec extensions beyond RV32IMA
• you want a supported commercial silicon product with vendor support

Facets

library · maturity active

simulation embedded compiler hardware embedded-systems operating-systems embedded risc-v soc verilog cpu-design mmu rv32ima sv32 xv6 tinytapeout chip-design fpga open-source-silicon asic linux

Member repositories

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