# splinedrive/kianRiscV

RISC-V XV6/Linux SoC, marchID: 0x2b, 0x34

Repository: https://github.com/splinedrive/kianRiscV
Canonical: https://ross.abutalabs.com/products/kianriscv
Language: Verilog
License: ISC
License Family: permissive
Topics: riscv, verilog, fpga, cpu, linux, mmu, rv32ima, sv32, systemverilog, xv6, soc, asic, chipdesign, tinytapeout, system-on-chip, x11
Last push: 2026-05-29T23:22:43+00:00

## Health v2 (maintenance only)
Score: 70/100 (v2, computed 2026-09-03T02:20:16.233290+00:00)
- activity 84, release rhythm 34, longevity 100
- inputs: {"age_days": 1804, "days_push": 96, "days_rel": 230, "gap_med": null, "n_releases_24m": 1}
- flags: none
- formula: round(0.45*activity + 0.35*rhythm + 0.20*longevity); archived -> min(score, 10)

## Adoption (not part of the score)
Stars 1113, forks 80 (observed 2026-08-28T04:03:38.053300+00:00)

## What it is
A collection of open-source RISC-V RV32IMA system-on-chip designs written in Verilog/SystemVerilog, featuring MMU with SV32 virtual memory support capable of booting Linux and XV6. Includes FPGA implementations and full-custom ASIC designs fabricated through TinyTapeout and wafer.space shuttle runs.

## Use cases
- learning RISC-V CPU and SoC design in Verilog
- running Linux or XV6 on a custom open-source RISC-V SoC
- building an FPGA soft-core with MMU and virtual memory
- fabricating an open-source RISC-V ASIC via TinyTapeout
- studying SV32 virtual memory implementation in hardware
- prototyping embedded systems on open silicon

## When to choose
- you want a fully open-source RTL design for a Linux-capable RV32IMA SoC
- you need an educational reference for MMU/SV32 and SoC integration in Verilog
- you plan to tape out a small RISC-V chip with open EDA tools and PDKs

## When to avoid
- you need high-performance application-class RISC-V cores with out-of-order execution
- you require RV64 or modern privileged spec extensions beyond RV32IMA
- you want a supported commercial silicon product with vendor support

## Facets
- artifact type: library
- maturity: active
- function: simulation, embedded, compiler
- domain: hardware, embedded-systems, operating-systems
- platform: embedded
- tags: risc-v, soc, verilog, cpu-design, mmu, rv32ima, sv32, xv6, tinytapeout, chip-design, fpga, open-source-silicon, asic, linux

## Member repositories
- splinedrive/kianRiscV (main) score 70

## Provenance
- Observed fields: from GitHub, fetched 2026-08-28T04:03:38.053300+00:00.
- Health v2: computed from the inputs above; adoption is never an input.
- Inferred fields (summary, facets, guidance): AI-extracted, prompt v1, taxonomy v1, on 2026-08-30T06:42:37.851566+00:00, confidence not recorded.
  - readme: https://github.com/splinedrive/kianRiscV (fetched 2026-08-28T04:03:38.053300+00:00, sha b5988daa80dc)
- Data as of 2026-08-30T08:39:29.467469+00:00.