nvdla/hw

Health v2 · maintenance only

Flags: no_releases no_license

Adoption not part of the score

2141 stars · 654 forks observed · 2026-08-28

What it is AI-extracted, prompt v1, taxonomy v1, 2026-08-30, confidence not recorded

The hardware release of NVIDIA's open-source Deep Learning Accelerator (NVDLA), containing Verilog RTL, a C-model, testbenches, and synthesis scripts for a configurable deep learning inference accelerator. It provides a modular, scalable architecture intended for integration into SoC designs.

Use cases

• integrate a deep learning inference accelerator into a custom SoC
• simulate and validate NVDLA RTL with trace-player testbenches
• synthesize the NVDLA design for FPGA or ASIC targets
• study open-source neural accelerator microarchitecture
• estimate accelerator performance with the provided perf model
• run sanity simulations of the full-precision NVDLA configuration

When to choose

• you need an open, licensable DLA hardware design to integrate into your chip or FPGA project
• you want to study or extend an industrial-grade deep learning accelerator RTL
• you need a C-model reference for hardware/software co-verification

When to avoid

• you need a software-only inference library or GPU runtime
• you expect active feature development - the nvdlav1 branch is a sustaining release with bug fixes only
• you need a turnkey product rather than RTL IP requiring integration effort

Facets

library · maturity maintenance

machine-learning deep-learning simulation embedded deep-learning hardware embedded-systems machine-learning embedded rtl verilog hardware-accelerator nvdla inference-accelerator c-model testbench synthesis

Member repositories

For agents

markdown · JSON · MCP: product_card(name="nvdla/hw")