hdl-util/hdmi

Health v2 · maintenance only

Flags: no_license

Adoption not part of the score

1290 stars · 143 forks observed · 2026-08-28

What it is AI-extracted, prompt v1, taxonomy v1, 2026-08-30, confidence not recorded

A SystemVerilog library that implements true HDMI 1.4b output on FPGAs, transmitting both video and audio (data islands, InfoFrames, L-PCM) over TMDS without requiring a proprietary HDMI IP license. It provides drop-in source modules for Altera/Intel and Xilinx toolchains, including a VGA-compatible 8x16 text mode and support for multiple standard video formats.

Use cases

• output HDMI video and audio from an FPGA
• send audio over HDMI without proprietary IP blocks
• display text on a monitor from an FPGA dev board
• implement an HDMI/DVI transmitter in SystemVerilog
• avoid HDMI IP licensing costs in FPGA projects
• generate 720x480p or other standard video formats on a dev board

When to choose

• You need true HDMI signaling with audio and InfoFrames, not just DVI-compatible video
• You want free, open-source (MIT/Apache-2.0) HDL instead of licensing an HDMI IP block
• You are targeting Altera/Intel (Quartus) or Xilinx (Vivado) FPGAs and want drop-in modules or an hdlmake remote module

When to avoid

• You need HDMI input/capture - this only implements a source (output) side
• You require YCbCr, deep color, interlaced video, pixel repetition, or multichannel (>2ch) audio, which are unimplemented
• You target Lattice or Gowin FPGAs, where support is untested or still work-in-progress
• You are shipping an end-consumer product and cannot meet HDMI adopter/royalty requirements, which apply regardless of this code's license

Facets

library · maturity stable

sdk graphics hardware embedded-systems media embedded fpga hdmi dvi systemverilog hdl ip-core tmds video-output audio-output quartus vivado xilinx altera hdlmake hardware-description data-islands infobox pcm-audio text-mode

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markdown · JSON · MCP: product_card(name="hdl-util/hdmi")