# hdl-util/hdmi

Send video/audio over HDMI on an FPGA

Repository: https://github.com/hdl-util/hdmi
Canonical: https://ross.abutalabs.com/products/hdmi
Homepage: https://purisa.me/blog/hdmi-released/
Language: SystemVerilog
License: NOASSERTION
License Family: other
Topics: hdmi, fpga, dvi, audio, video, systemverilog, hdlmake, quartus, altera, xilinx, intel, vivado
Last push: 2026-07-13T16:48:46+00:00

## Health v2 (maintenance only)
Score: 64/100 (v2, computed 2026-09-03T02:20:16.233290+00:00)
- activity 92, release rhythm 8, longevity 100
- inputs: {"age_days": 2574, "days_push": 51, "days_rel": null, "gap_med": null, "n_releases_24m": 0}
- flags: no_license
- formula: round(0.45*activity + 0.35*rhythm + 0.20*longevity); archived -> min(score, 10)

## Adoption (not part of the score)
Stars 1290, forks 143 (observed 2026-08-28T04:04:15.519072+00:00)

## What it is
A SystemVerilog library that implements true HDMI 1.4b output on FPGAs, transmitting both video and audio (data islands, InfoFrames, L-PCM) over TMDS without requiring a proprietary HDMI IP license. It provides drop-in source modules for Altera/Intel and Xilinx toolchains, including a VGA-compatible 8x16 text mode and support for multiple standard video formats.

## Use cases
- output HDMI video and audio from an FPGA
- send audio over HDMI without proprietary IP blocks
- display text on a monitor from an FPGA dev board
- implement an HDMI/DVI transmitter in SystemVerilog
- avoid HDMI IP licensing costs in FPGA projects
- generate 720x480p or other standard video formats on a dev board

## When to choose
- You need true HDMI signaling with audio and InfoFrames, not just DVI-compatible video
- You want free, open-source (MIT/Apache-2.0) HDL instead of licensing an HDMI IP block
- You are targeting Altera/Intel (Quartus) or Xilinx (Vivado) FPGAs and want drop-in modules or an hdlmake remote module

## When to avoid
- You need HDMI input/capture - this only implements a source (output) side
- You require YCbCr, deep color, interlaced video, pixel repetition, or multichannel (>2ch) audio, which are unimplemented
- You target Lattice or Gowin FPGAs, where support is untested or still work-in-progress
- You are shipping an end-consumer product and cannot meet HDMI adopter/royalty requirements, which apply regardless of this code's license

## Facets
- artifact type: library
- maturity: stable
- function: sdk, graphics
- domain: hardware, embedded-systems, media
- platform: embedded
- tags: fpga, hdmi, dvi, systemverilog, hdl, ip-core, tmds, video-output, audio-output, quartus, vivado, xilinx, altera, hdlmake, hardware-description, data-islands, infobox, pcm-audio, text-mode

## Member repositories
- hdl-util/hdmi (main) score 64

## Provenance
- Observed fields: from GitHub, fetched 2026-08-28T04:04:15.519072+00:00.
- Health v2: computed from the inputs above; adoption is never an input.
- Inferred fields (summary, facets, guidance): AI-extracted, prompt v1, taxonomy v1, on 2026-08-30T04:55:38.394567+00:00, confidence not recorded.
  - readme: https://github.com/hdl-util/hdmi (fetched 2026-08-28T04:04:15.519072+00:00, sha 96028ff16120)
  - homepage: https://purisa.me/blog/hdmi-released/ (fetched 2026-08-29T12:11:25.725029+00:00, sha e9e635bc107a)
  - site_page: https://purisa.me/about (fetched 2026-08-29T12:11:25.734405+00:00, sha fd27af987e68)
- Data as of 2026-08-30T08:39:29.467469+00:00.