janestreet/hardcaml

Health v2 · maintenance only

Adoption not part of the score

1118 stars · 64 forks observed · 2026-08-28

What it is AI-extracted, prompt v1, taxonomy v1, 2026-08-30, confidence not recorded

Hardcaml is an OCaml library for designing and testing hardware circuits, letting users express hardware designs using OCaml's type system and metaprogramming features. It includes a simulation backend and can compile designs to hierarchical Verilog or VHDL for FPGA synthesis.

Use cases

• design hardware circuits in OCaml instead of Verilog or VHDL
• simulate digital hardware designs with waveform visualization
• generate parameterized RTL pipelines using higher-order functions and functors
• compile hardware designs to Verilog or VHDL for FPGA synthesis
• write custom backends or circuit analysis tools
• avoid type-confusion bugs in hardware signal wiring

When to choose

• you want to use a strongly typed functional language for hardware design
• you need to generate large unrolled or pipelined hardware designs programmatically
• you want to simulate and validate hardware entirely within OCaml
• you value code reuse and parametrization across hardware projects

When to avoid

• you need an industry-standard HDL workflow with existing Verilog/VHDL tooling and IP
• your team has no OCaml experience
• you need analog or mixed-signal design capabilities
• you require vendor-specific synthesis features not covered by RTL export

Facets

library · maturity active

simulation compiler testing developer-tools hardware embedded-systems programming-languages developer-tools windows cross-platform hardware-description-language rtl fpga verilog vhdl ocaml circuit-design digital-design linux macos

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