B-Lang-org/bsc

Health v2 · maintenance only

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1141 stars · 183 forks observed · 2026-08-28

What it is AI-extracted, prompt v1, taxonomy v1, 2026-08-30, confidence not recorded

The Bluespec Compiler (BSC) is a compiler, simulator, and toolchain for the Bluespec Hardware Description Language, supporting both Bluespec SystemVerilog and Bluespec Haskell syntax. It emits standard Verilog for synthesis and includes the Bluesim simulator, a standard library, and TCL scripting support.

Use cases

• compile Bluespec HDL designs to Verilog
• simulate digital hardware designs before synthesis
• write high-level hardware descriptions with guarded atomic actions
• develop CPU cores like RISC-V processors in a high-level HDL
• verify hardware designs with a strong type system before synthesis
• script hardware build flows with TCL

When to choose

• you want a high-level, type-safe hardware description language instead of raw Verilog
• you need modular hardware design where the compiler derives schedulers from invariants
• you need Verilog output compatible with any synthesis toolchain
• you want an integrated simulator for your HDL designs

When to avoid

• you only need to write low-level RTL directly in Verilog or VHDL
• your team has no appetite for learning a new HDL
• you need vendor-specific synthesis features not expressible in generated Verilog

Facets

cli-tool · maturity active

compiler programming-language simulation developer-tools hardware embedded-systems programming-languages compilers cli hardware-description-language bluespec verilog-generation fpga bluesim systemverilog linux macos

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