greatscottgadgets/luna

Health v2 · maintenance only

Adoption not part of the score

1133 stars · 185 forks observed · 2026-08-28

What it is AI-extracted, prompt v1, taxonomy v1, 2026-08-30, confidence not recorded

LUNA is an Amaranth HDL (Python) framework providing FPGA gateware and software for working with USB, from passive protocol analysis to building custom USB devices and SoC peripherals. It pairs with Cynthion hardware and tools like Facedancer and Packetry for USB research, hacking, and development.

Use cases

• capture and analyze low/full/high-speed USB traffic with an FPGA
• implement a custom USB device in gateware or software
• add USB peripherals to a SoC design over Wishbone
• reverse engineer USB devices for security research
• emulate USB devices with Facedancer as a backend
• build a USB man-in-the-middle proxy

When to choose

• you need programmable FPGA-based USB analysis or emulation
• you want to write USB gateware in Python via Amaranth instead of Verilog
• you use Cynthion or compatible FPGA hardware for USB work

When to avoid

• you only need software-only USB sniffing on a standard host controller
• your target FPGA or USB speed (e.g. SuperSpeed) is not yet supported
• you need a turnkey analyzer without any HDL involvement

Facets

library · maturity active

embedded security reverse-engineering simulation developer-tools hardware embedded-systems security reverse-engineering developer-tools python embedded fpga usb amaranth-hdl gateware protocol-analyzer hardware-hacking soc wishbone

Member repositories

For agents

markdown · JSON · MCP: product_card(name="greatscottgadgets/luna")