riscv-mcu/e203_hbirdv2

Health v2 · maintenance only

Flags: no_releases

Adoption not part of the score

1903 stars · 428 forks observed · 2026-08-28

What it is AI-extracted, prompt v1, taxonomy v1, 2026-08-30, confidence not recorded

Hummingbirdv2 E203 is an open-source ultra-low power 32-bit RISC-V processor core and SoC written in Verilog, developed by Nuclei System Technology. It includes a configurable RV32IMAC core with the NICE co-unit extension, an SoC with APB peripherals (GPIO, I2C, UART, SPI, PWM), FPGA board support, and simulation flows.

Use cases

• learn RISC-V processor architecture from readable Verilog source
• build a low-power RISC-V MCU SoC on an FPGA
• add custom hardware accelerators via the NICE co-unit interface
• run embedded firmware on an open-source RISC-V SoC in simulation
• prototype custom RISC-V cores for academic and non-commercial projects
• study SoC peripheral implementations like UART, SPI, and I2C in Verilog

When to choose

• you need an open-source, well-documented RISC-V core and SoC in Verilog for FPGA or ASIC study
• you want to extend a RISC-V core with custom instructions using NICE
• you are teaching or learning embedded RISC-V design with simulation and FPGA flows

When to avoid

• you need a high-performance, out-of-order, or 64-bit application-class core
• you require commercial licensing or production-grade silicon-proven IP support
• you prefer SystemVerilog/UVM verification environments or non-RISC-V ISAs

Facets

library · maturity stable

embedded simulation developer-tools embedded-systems hardware developer-tools windows risc-v verilog soc fpga low-power cpu-core open-source-hardware nuclei hummingbird e203 linux

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markdown · JSON · MCP: product_card(name="riscv-mcu/e203_hbirdv2")