# Xilinx/Vitis_Libraries

Vitis Libraries

Repository: https://github.com/Xilinx/Vitis_Libraries
Canonical: https://ross.abutalabs.com/products/vitis_libraries
Homepage: https://docs.amd.com/r/en-US/Vitis_Libraries
Language: C++
License: Apache-2.0
License Family: permissive
Last push: 2026-06-24T14:36:23+00:00

## Health v2 (maintenance only)
Score: 87/100 (v2, computed 2026-09-03T02:20:16.233290+00:00)
- activity 89, release rhythm 78, longevity 100
- inputs: {"age_days": 2536, "days_push": 70, "days_rel": 70, "gap_med": 55, "n_releases_24m": 12}
- flags: none
- formula: round(0.45*activity + 0.35*rhythm + 0.20*longevity); archived -> min(score, 10)

## Adoption (not part of the score)
Stars 1122, forks 411 (observed 2026-08-28T04:03:39.902867+00:00)

## What it is
A collection of open-source, performance-optimized accelerated libraries for the AMD Vitis Unified Software Platform, offering out-of-the-box FPGA acceleration for math, linear algebra, DSP, vision, security, and other domains. Libraries are callable from C, C++, Python, and Matlab with minimal code changes to existing host applications.

## Use cases
- accelerate math and linear algebra kernels on FPGA hardware
- offload image and vision processing workloads to programmable logic
- run DSP signal processing pipelines on AMD adaptive SoCs
- speed up cryptographic operations with hardware acceleration
- port existing x86 host application code to FPGA accelerators
- build accelerated applications for AMD embedded platforms

## When to choose
- you develop for AMD/Xilinx FPGAs or adaptive SoCs with Vitis
- you need pre-optimized hardware acceleration without writing RTL
- your workload matches a covered domain like vision, DSP, or security

## When to avoid
- you target GPUs or CPUs rather than AMD FPGA hardware
- you need the deprecated PL libraries like graph, hpc, or data_compression in new releases
- you work on unsupported Alveo platforms such as U200, U250, or U280

## Facets
- artifact type: library
- maturity: active
- function: math, image-processing, cryptography, audio-processing, simulation, graphics
- domain: hardware, embedded-systems, image-processing, developer-tools
- platform: cpp, c, python, embedded
- tags: fpga, xilinx, amd, hardware-acceleration, vitis, fpga-accelerated-libraries, dsp, linear-algebra, alveo, aie, algorithms, linux

## Member repositories
- Xilinx/Vitis_Libraries (main) score 87

## Provenance
- Observed fields: from GitHub, fetched 2026-08-28T04:03:39.902867+00:00.
- Health v2: computed from the inputs above; adoption is never an input.
- Inferred fields (summary, facets, guidance): AI-extracted, prompt v1, taxonomy v1, on 2026-08-30T06:40:55.012417+00:00, confidence not recorded.
  - readme: https://github.com/Xilinx/Vitis_Libraries (fetched 2026-08-28T04:03:39.902867+00:00, sha 168473d31d42)
- Data as of 2026-08-30T08:39:29.467469+00:00.