# sin-x/FPGA

数字IC相关资料

Repository: https://github.com/sin-x/FPGA
Canonical: https://ross.abutalabs.com/products/sin-x-fpga
License Family: other
Last push: 2025-07-01T14:08:27+00:00

## Health v2 (maintenance only)
Score: 45/100 (v2, computed 2026-09-02T17:46:02.011165+00:00)
- activity 29, release rhythm 35, longevity 100
- inputs: {"age_days": 2256, "days_push": 428, "days_rel": null, "gap_med": null, "n_releases_24m": 0}
- flags: no_releases, no_license
- formula: round(0.45*activity + 0.35*rhythm + 0.20*longevity); archived -> min(score, 10)

## Adoption (not part of the score)
Stars 1579, forks 369 (observed 2026-08-28T04:05:06.775373+00:00)

## What it is
A curated collection of notes, PDFs, links, and study materials on digital IC design, covering FPGA principles, static timing analysis, clock domain crossing, low power, SystemVerilog verification, and interview questions. It is a Chinese-language knowledge repository rather than executable software.

## Use cases
- learn FPGA design fundamentals
- study static timing analysis and timing constraints
- prepare for digital IC design interviews
- understand clock domain crossing and async FIFO design
- find SystemVerilog verification resources
- review digital logic and DSP concepts

## When to choose
- you are studying digital IC or FPGA design and want curated notes and references
- you are preparing for IC design written tests and interviews
- you want a single index of CDC, STA, and verification materials

## When to avoid
- you need runnable code, tools, or libraries rather than study notes
- you need English-language documentation only
- you need an official or peer-reviewed curriculum

## Facets
- artifact type: learning-resource
- maturity: active
- function: documentation, developer-tools
- domain: hardware, education, embedded-systems
- platform: cross-platform
- tags: fpga, digital-ic, verilog, systemverilog, static-timing-analysis, clock-domain-crossing, interview-preparation, notes-collection, awesome-list

## Member repositories
- sin-x/FPGA (main) score 45

## Provenance
- Observed fields: from GitHub, fetched 2026-08-28T04:05:06.775373+00:00.
- Health v2: computed from the inputs above; adoption is never an input.
- Inferred fields (summary, facets, guidance): AI-extracted, prompt v1, taxonomy v1, on 2026-08-30T03:56:53.248056+00:00, confidence not recorded.
  - readme: https://github.com/sin-x/FPGA (fetched 2026-08-28T04:05:06.775373+00:00, sha 69df99c9c8b3)
- Data as of 2026-08-30T08:39:29.467469+00:00.