# YosysHQ/picorv32

PicoRV32 - A Size-Optimized RISC-V CPU

Repository: https://github.com/YosysHQ/picorv32
Canonical: https://ross.abutalabs.com/products/picorv32
Language: Verilog
License: ISC
License Family: permissive
Last push: 2026-07-31T05:59:04+00:00

## Health v2 (maintenance only)
Score: 66/100 (v2, computed 2026-09-02T17:46:02.011165+00:00)
- activity 95, release rhythm 8, longevity 100
- inputs: {"age_days": 4106, "days_push": 33, "days_rel": null, "gap_med": null, "n_releases_24m": 0}
- flags: none
- formula: round(0.45*activity + 0.35*rhythm + 0.20*longevity); archived -> min(score, 10)

## Adoption (not part of the score)
Stars 4362, forks 992 (observed 2026-08-28T04:08:46.564816+00:00)

## What it is
PicoRV32 is a size-optimized RISC-V RV32IMC CPU core written in Verilog, configurable as RV32E/I/IC/IM/IMC with optional interrupt controller and co-processor interface. It is designed as an auxiliary processor for FPGA designs and ASICs, occupying only 750-2000 LUTs on Xilinx 7-series FPGAs with high maximum clock frequencies.

## Use cases
- add a small auxiliary CPU to an FPGA design
- embed a RISC-V core in an ASIC
- implement a soft CPU with minimal LUT usage
- run bare-metal RISC-V firmware on an FPGA
- integrate a processor without crossing clock domains
- build a custom RV32E embedded controller

## When to choose
- you need a very small, configurable RISC-V soft core for FPGA or ASIC
- high fmax and easy timing closure matter more than top performance
- you want a permissively licensed (ISC) CPU core you can extend via the co-processor interface

## When to avoid
- you need a high-performance application-class processor with caches and MMU
- you want a fully verified, formally certified CPU for safety-critical products
- you need out-of-order execution or Linux-capable features

## Facets
- artifact type: library
- maturity: stable
- function: embedded, simulation
- domain: hardware, embedded-systems
- platform: -
- tags: risc-v, cpu-core, fpga, asic, verilog, soft-cpu

## Member repositories
- YosysHQ/picorv32 (main) score 66

## Provenance
- Observed fields: from GitHub, fetched 2026-08-28T04:08:46.564816+00:00.
- Health v2: computed from the inputs above; adoption is never an input.
- Inferred fields (summary, facets, guidance): AI-extracted, prompt v1, taxonomy v1, on 2026-08-29T18:21:26.301738+00:00, confidence not recorded.
  - readme: https://github.com/YosysHQ/picorv32 (fetched 2026-08-28T04:08:46.564816+00:00, sha 78e0b8ee9b4e)
- Data as of 2026-08-30T08:39:29.467469+00:00.