# open-logic/open-logic

Open Logic FPGA Standard Library

Repository: https://github.com/open-logic/open-logic
Canonical: https://ross.abutalabs.com/products/open-logic
Language: VHDL
License: NOASSERTION
License Family: other
Last push: 2026-08-25T19:25:56+00:00

## Health v2 (maintenance only)
Score: 85/100 (v2, computed 2026-09-03T02:20:16.233290+00:00)
- activity 99, release rhythm 80, longevity 64
- inputs: {"age_days": 905, "days_push": 8, "days_rel": 56, "gap_med": 40.0, "n_releases_24m": 17}
- flags: no_license
- formula: round(0.45*activity + 0.35*rhythm + 0.20*longevity); archived -> min(score, 10)

## Adoption (not part of the score)
Stars 1006, forks 115 (observed 2026-08-28T04:03:11.837838+00:00)

## What it is
Open Logic is a VHDL-2008 standard library for FPGA projects, providing reusable, vendor- and tool-independent hardware components under a permissive license. It aims to be the equivalent of stdlib for HDL development and can also be instantiated from SystemVerilog.

## Use cases
- reuse common FPGA components across vendor tools
- build VHDL projects with a standard library of building blocks
- use VHDL components from SystemVerilog designs
- develop FPGA firmware for commercial projects with a permissive license
- avoid rewriting common HDL utilities for each project

## When to choose
- you develop FPGA designs in VHDL-2008 and want reusable, tool-independent components
- you need a permissively licensed HDL library usable in commercial projects
- you want cross-language usage from SystemVerilog

## When to avoid
- your project targets Verilog-only toolchains without VHDL support
- you need components not covered by the library's entity list
- you require an officially standardized library

## Facets
- artifact type: library
- maturity: active
- function: developer-tools, embedded
- domain: embedded-systems, hardware, developer-tools
- platform: embedded, cross-platform
- tags: vhdl, fpga, hdl, standard-library, system-verilog

## Member repositories
- open-logic/open-logic (main) score 85

## Provenance
- Observed fields: from GitHub, fetched 2026-08-28T04:03:11.837838+00:00.
- Health v2: computed from the inputs above; adoption is never an input.
- Inferred fields (summary, facets, guidance): AI-extracted, prompt v1, taxonomy v1, on 2026-08-30T07:12:58.273700+00:00, confidence not recorded.
  - readme: https://github.com/open-logic/open-logic (fetched 2026-08-28T04:03:11.837838+00:00, sha 61b05e8bf347)
- Data as of 2026-08-30T08:39:29.467469+00:00.