# logisim-evolution/logisim-evolution

Digital logic design tool and simulator

Repository: https://github.com/logisim-evolution/logisim-evolution
Canonical: https://ross.abutalabs.com/products/logisim-evolution
Language: Java
License: GPL-3.0
License Family: copyleft
Topics: logisim-evolution, education, circuit, circuits, digital-circuit, digital-circuits, simulator, logic, digital-logic, digital-logic-design, fpga, timing-diagram, logisim, vhdl, verilog
Last push: 2026-08-26T17:20:58+00:00

## Health v2 (maintenance only)
Score: 81/100 (v2, computed 2026-09-02T17:46:02.011165+00:00)
- activity 99, release rhythm 47, longevity 100
- inputs: {"age_days": 4366, "days_push": 7, "days_rel": 199, "gap_med": 161, "n_releases_24m": 2}
- flags: none
- formula: round(0.45*activity + 0.35*rhythm + 0.20*longevity); archived -> min(score, 10)

## Adoption (not part of the score)
Stars 7488, forks 996 (observed 2026-08-28T04:10:00.231717+00:00)

## What it is
Logisim-evolution is a free, open-source, cross-platform Java application for designing and simulating digital logic circuits. It offers an easy-to-use circuit designer, chronogram signal visualization, VHDL components, and electronic board integration for simulating schematics on real hardware.

## Use cases
- design and simulate digital logic circuits for a computer architecture class
- build a simple AND gate circuit and toggle inputs to see the output
- draw schematics and simulate them on real FPGA hardware
- create components whose behavior is specified in VHDL
- visualize signal evolution over time with a chronogram
- teach students logic gates, flip-flops, and subcircuits interactively

## When to choose
- you need an educational tool for learning or teaching digital logic design
- you want a free cross-platform GUI circuit simulator with a large component library
- you need to simulate schematics on real electronic boards or use VHDL components

## When to avoid
- you need professional EDA tools for production IC or PCB design
- you require analog circuit simulation rather than digital logic
- you need a headless or scriptable-only simulation workflow

## Facets
- artifact type: application
- maturity: active
- function: simulation, gui, graphics
- domain: education, simulation, hardware, developer-tools
- platform: cross-platform, jvm
- tags: digital-logic, circuit-design, vhdl, verilog, fpga, logic-simulator, java, education, desktop

## Member repositories
- logisim-evolution/logisim-evolution (main) score 81

## Provenance
- Observed fields: from GitHub, fetched 2026-08-28T04:10:00.231717+00:00.
- Health v2: computed from the inputs above; adoption is never an input.
- Inferred fields (summary, facets, guidance): AI-extracted, prompt v1, taxonomy v1, on 2026-08-29T17:37:34.867441+00:00, confidence not recorded.
  - readme: https://github.com/logisim-evolution/logisim-evolution (fetched 2026-08-28T04:10:00.231717+00:00, sha 85f23c62212f)
- Data as of 2026-08-30T08:39:29.467469+00:00.