ghdl/ghdl

Health v2 · maintenance only

Adoption not part of the score

2868 stars · 425 forks observed · 2026-08-28

What it is AI-extracted, prompt v1, taxonomy v1, 2026-08-30, confidence not recorded

GHDL is an open-source analyzer, compiler, simulator, and experimental synthesizer for the VHDL hardware description language, supporting IEEE 1076 standards from 1987 through 2008. It compiles VHDL designs to native machine code for high-speed simulation rather than interpreting them.

Use cases

• simulate VHDL designs
• run VHDL testbenches
• compile VHDL 2008 code
• verify FPGA RTL before synthesis
• simulate digital hardware on a PC
• check VHDL code for standards compliance
• integrate VHDL simulation into CI pipelines

When to choose

• you need a free, open-source VHDL simulator
• you want fast native-code simulation of VHDL designs
• you need support for multiple VHDL standard versions (87/93/02/08)
• you want to script VHDL testbenches in CI without commercial EDA licenses

When to avoid

• you need Verilog or SystemVerilog simulation
• you require vendor-verified synthesis for production FPGA flows
• you need advanced commercial simulator features like coverage-driven verification or UVM support

Facets

application · maturity active

compiler interpreter testing developer-tools hardware simulation developer-tools testing windows cross-platform cli vhdl hdl-simulator testbench llvm gcc hardware-description-language synthesizer linux macos

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markdown · JSON · MCP: product_card(name="ghdl/ghdl")